Instructions

Instructions for each machine:

i960:ka_sa MEM - Memory


i960:ka_sa ALU - ALU


i960:ka_sa BR - Branch


i960:ka_sa i960:ka_sa - I960 KA and SA processors


i960:ca MEM - Memory


i960:ca ALU - ALU


i960:ca BR - Branch


i960:ca i960:ca - I960 CA processor


Individual instructions descriptions


addo - addo reg/reg

addo1 - addo lit/reg

addo2 - addo reg/lit

addo3 - addo lit/lit

and - and reg/reg

and1 - and lit/reg

and2 - and reg/lit

and3 - and lit/lit

andnot - andnot reg/reg

andnot1 - andnot lit/reg

andnot2 - andnot reg/lit

andnot3 - andnot lit/lit

b - b

bbc-lit - bbc lit

bbc-reg - bbc reg

bbs-lit - bbs lit

bbs-reg - bbs reg

be - be

bg - bg

bge - bge

bl - bl

ble - ble

bne - bne

bno - bno

bo - bo

bx-disp - bx-disp

bx-indirect - bx-indirect

bx-indirect-disp - bx-indirect-disp

bx-indirect-index - bx-indirect-index

bx-indirect-offset - bx-indirect-offset

calls - calls

callx-disp - callx-disp

callx-indirect - callx-indirect

callx-indirect-offset - callx-indirect-offset

clrbit - clrbit reg/reg

clrbit1 - clrbit lit/reg

clrbit2 - clrbit reg/lit

clrbit3 - clrbit lit/lit

cmpi - cmpi reg/reg

cmpi1 - cmpi lit/reg

cmpi2 - cmpi reg/lit

cmpi3 - cmpi lit/lit

cmpibe-lit - cmpibe lit

cmpibe-reg - cmpibe reg

cmpibg-lit - cmpibg lit

cmpibg-reg - cmpibg reg

cmpibge-lit - cmpibge lit

cmpibge-reg - cmpibge reg

cmpibl-lit - cmpibl lit

cmpibl-reg - cmpibl reg

cmpible-lit - cmpible lit

cmpible-reg - cmpible reg

cmpibne-lit - cmpibne lit

cmpibne-reg - cmpibne reg

cmpo - cmpo reg/reg

cmpo1 - cmpo lit/reg

cmpo2 - cmpo reg/lit

cmpo3 - cmpo lit/lit

cmpobe-lit - cmpobe lit

cmpobe-reg - cmpobe reg

cmpobg-lit - cmpobg lit

cmpobg-reg - cmpobg reg

cmpobge-lit - cmpobge lit

cmpobge-reg - cmpobge reg

cmpobl-lit - cmpobl lit

cmpobl-reg - cmpobl reg

cmpoble-lit - cmpoble lit

cmpoble-reg - cmpoble reg

cmpobne-lit - cmpobne lit

cmpobne-reg - cmpobne reg

divi - divi reg/reg

divi1 - divi lit/reg

divi2 - divi reg/lit

divi3 - divi lit/lit

divo - divo reg/reg

divo1 - divo lit/reg

divo2 - divo reg/lit

divo3 - divo lit/lit

emul - emul reg/reg

emul1 - emul lit/reg

emul2 - emul reg/lit

emul3 - emul lit/lit

flushreg - flushreg

fmark - fmark

ld-disp - ld-disp

ld-index-disp - ld-index-disp

ld-indirect - ld-indirect

ld-indirect-disp - ld-indirect-disp

ld-indirect-index - ld-indirect-index

ld-indirect-index-disp - ld-indirect-index-disp

ld-indirect-offset - ld-indirect-offset

ld-offset - ld-offset

lda-disp - lda-disp

lda-index-disp - lda-index-disp

lda-indirect - lda-indirect

lda-indirect-disp - lda-indirect-disp

lda-indirect-index - lda-indirect-index

lda-indirect-index-disp - lda-indirect-index-disp

lda-indirect-offset - lda-indirect-offset

lda-offset - lda-offset

ldib-disp - ldib-disp

ldib-index-disp - ldib-index-disp

ldib-indirect - ldib-indirect

ldib-indirect-disp - ldib-indirect-disp

ldib-indirect-index - ldib-indirect-index

ldib-indirect-index-disp - ldib-indirect-index-disp

ldib-indirect-offset - ldib-indirect-offset

ldib-offset - ldib-offset

ldis-disp - ldis-disp

ldis-index-disp - ldis-index-disp

ldis-indirect - ldis-indirect

ldis-indirect-disp - ldis-indirect-disp

ldis-indirect-index - ldis-indirect-index

ldis-indirect-index-disp - ldis-indirect-index-disp

ldis-indirect-offset - ldis-indirect-offset

ldis-offset - ldis-offset

ldl-disp - ldl-disp

ldl-index-disp - ldl-index-disp

ldl-indirect - ldl-indirect

ldl-indirect-disp - ldl-indirect-disp

ldl-indirect-index - ldl-indirect-index

ldl-indirect-index-disp - ldl-indirect-index-disp

ldl-indirect-offset - ldl-indirect-offset

ldl-offset - ldl-offset

ldob-disp - ldob-disp

ldob-index-disp - ldob-index-disp

ldob-indirect - ldob-indirect

ldob-indirect-disp - ldob-indirect-disp

ldob-indirect-index - ldob-indirect-index

ldob-indirect-index-disp - ldob-indirect-index-disp

ldob-indirect-offset - ldob-indirect-offset

ldob-offset - ldob-offset

ldos-disp - ldos-disp

ldos-index-disp - ldos-index-disp

ldos-indirect - ldos-indirect

ldos-indirect-disp - ldos-indirect-disp

ldos-indirect-index - ldos-indirect-index

ldos-indirect-index-disp - ldos-indirect-index-disp

ldos-indirect-offset - ldos-indirect-offset

ldos-offset - ldos-offset

ldq-disp - ldq-disp

ldq-index-disp - ldq-index-disp

ldq-indirect - ldq-indirect

ldq-indirect-disp - ldq-indirect-disp

ldq-indirect-index - ldq-indirect-index

ldq-indirect-index-disp - ldq-indirect-index-disp

ldq-indirect-offset - ldq-indirect-offset

ldq-offset - ldq-offset

ldt-disp - ldt-disp

ldt-index-disp - ldt-index-disp

ldt-indirect - ldt-indirect

ldt-indirect-disp - ldt-indirect-disp

ldt-indirect-index - ldt-indirect-index

ldt-indirect-index-disp - ldt-indirect-index-disp

ldt-indirect-offset - ldt-indirect-offset

ldt-offset - ldt-offset

modac - modac

modpc - modpc

mov - mov reg

mov1 - mov lit

movl - movl reg

movl1 - movl lit

movq - movq reg

movq1 - movq lit

movt - movt reg

movt1 - movt lit

mulo - mulo reg/reg

mulo1 - mulo lit/reg

mulo2 - mulo reg/lit

mulo3 - mulo lit/lit

nor - nor reg/reg

nor1 - nor lit/reg

nor2 - nor reg/lit

nor3 - nor lit/lit

not - not reg/reg

not1 - not lit/reg

not2 - not reg/lit

not3 - not lit/lit

notand - notand reg/reg

notand1 - notand lit/reg

notand2 - notand reg/lit

notand3 - notand lit/lit

notbit - notbit reg/reg

notbit1 - notbit lit/reg

notbit2 - notbit reg/lit

notbit3 - notbit lit/lit

or - or reg/reg

or1 - or lit/reg

or2 - or reg/lit

or3 - or lit/lit

ornot - ornot reg/reg

ornot1 - ornot lit/reg

ornot2 - ornot reg/lit

ornot3 - ornot lit/lit

remi - remi reg/reg

remi1 - remi lit/reg

remi2 - remi reg/lit

remi3 - remi lit/lit

remo - remo reg/reg

remo1 - remo lit/reg

remo2 - remo reg/lit

remo3 - remo lit/lit

ret - ret

setbit - setbit reg/reg

setbit1 - setbit lit/reg

setbit2 - setbit reg/lit

setbit3 - setbit lit/lit

shli - shli reg/reg

shli1 - shli lit/reg

shli2 - shli reg/lit

shli3 - shli lit/lit

shlo - shlo reg/reg

shlo1 - shlo lit/reg

shlo2 - shlo reg/lit

shlo3 - shlo lit/lit

shri - shri reg/reg

shri1 - shri lit/reg

shri2 - shri reg/lit

shri3 - shri lit/lit

shro - shro reg/reg

shro1 - shro lit/reg

shro2 - shro reg/lit

shro3 - shro lit/lit

st-disp - st-disp

st-index-disp - st-index-disp

st-indirect - st-indirect

st-indirect-disp - st-indirect-disp

st-indirect-index - st-indirect-index

st-indirect-index-disp - st-indirect-index-disp

st-indirect-offset - st-indirect-offset

st-offset - st-offset

stl-disp - stl-disp

stl-index-disp - stl-index-disp

stl-indirect - stl-indirect

stl-indirect-disp - stl-indirect-disp

stl-indirect-index - stl-indirect-index

stl-indirect-index-disp - stl-indirect-index-disp

stl-indirect-offset - stl-indirect-offset

stl-offset - stl-offset

stob-disp - stob-disp

stob-index-disp - stob-index-disp

stob-indirect - stob-indirect

stob-indirect-disp - stob-indirect-disp

stob-indirect-index - stob-indirect-index

stob-indirect-index-disp - stob-indirect-index-disp

stob-indirect-offset - stob-indirect-offset

stob-offset - stob-offset

stos-disp - stos-disp

stos-index-disp - stos-index-disp

stos-indirect - stos-indirect

stos-indirect-disp - stos-indirect-disp

stos-indirect-index - stos-indirect-index

stos-indirect-index-disp - stos-indirect-index-disp

stos-indirect-offset - stos-indirect-offset

stos-offset - stos-offset

stq-disp - stq-disp

stq-index-disp - stq-index-disp

stq-indirect - stq-indirect

stq-indirect-disp - stq-indirect-disp

stq-indirect-index - stq-indirect-index

stq-indirect-index-disp - stq-indirect-index-disp

stq-indirect-offset - stq-indirect-offset

stq-offset - stq-offset

stt-disp - stt-disp

stt-index-disp - stt-index-disp

stt-indirect - stt-indirect

stt-indirect-disp - stt-indirect-disp

stt-indirect-index - stt-indirect-index

stt-indirect-index-disp - stt-indirect-index-disp

stt-indirect-offset - stt-indirect-offset

stt-offset - stt-offset

subo - subo reg/reg

subo1 - subo lit/reg

subo2 - subo reg/lit

subo3 - subo lit/lit

teste-reg - teste reg

testg-reg - testg reg

testge-reg - testge reg

testl-reg - testl reg

testle-reg - testle reg

testne-reg - testne reg

testno-reg - testno reg

testo-reg - testo reg

xnor - xnor reg/reg

xnor1 - xnor lit/reg

xnor2 - xnor reg/lit

xnor3 - xnor lit/lit

xor - xor reg/reg

xor1 - xor lit/reg

xor2 - xor reg/lit

xor3 - xor lit/lit


Macro Instructions

Macro instructions for each machine:

i960:ka_sa - I960 KA and SA processors

i960:ca - I960 CA processor

Individual macro-instructions descriptions



This documentation was machine generated from the cgen cpu description files for this architecture.
https://sourceware.org/cgen/