15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x17 | 0x1 | fr |
(sequence ((QI result) (BI newcbit) (QI isLreg) (HI 16bval)) (set newcbit (add-cflag QI (reg QI h-spr 10) fr cbit)) (set dcbit (add-cflag QI (sll QI (reg QI h-spr 10) 4) (sll QI fr 4) cbit)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (addc HI 16bval (reg QI h-spr 10) cbit)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set result (reg QI h-spr f-reg))) (set result (addc QI (reg QI h-spr 10) fr cbit))) (set zbit (eq result 0)) (set cbit newcbit) (set fr result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x17 | 0x0 | fr |
(sequence ((QI result) (BI newcbit)) (set newcbit (add-cflag QI (reg QI h-spr 10) fr cbit)) (set dcbit (add-cflag QI (sll QI (reg QI h-spr 10) 4) (sll QI fr 4) cbit)) (set result (addc QI (reg QI h-spr 10) fr cbit)) (set zbit (eq result 0)) (set cbit newcbit) (set (reg QI h-spr 10) result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x7 | 0x1 | fr |
(sequence ((QI result) (QI isLreg) (HI 16bval)) (set cbit (add-cflag QI (reg QI h-spr 10) fr 0)) (set dcbit (add-cflag QI (sll QI (reg QI h-spr 10) 4) (sll QI fr 4) 0)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (add HI (and QI (reg QI h-spr 10) 255) 16bval)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set result (reg QI h-spr f-reg))) (set result (addc QI (reg QI h-spr 10) fr 0))) (set zbit (eq result 0)) (set fr result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x7 | 0x0 | fr |
(sequence ((QI result)) (set cbit (add-cflag QI (reg QI h-spr 10) fr 0)) (set dcbit (add-cflag QI (sll QI (reg QI h-spr 10) 4) (sll QI fr 4) 0)) (set result (addc QI (reg QI h-spr 10) fr 0)) (set zbit (eq result 0)) (set (reg QI h-spr 10) result))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xb | lit8 |
(sequence () (set cbit (add-cflag QI (reg QI h-spr 10) lit8 0)) (set dcbit (add-cflag QI (sll QI (reg QI h-spr 10) 4) (sll QI lit8 4) 0)) (set (reg QI h-spr 10) (add QI (reg QI h-spr 10) lit8)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x5 | 0x1 | fr |
(sequence () (set fr (and QI (reg QI h-spr 10) fr)) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x5 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (and QI fr (reg QI h-spr 10))) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xe | lit8 |
(sequence () (set (reg QI h-spr 10) (and QI (reg QI h-spr 10) lit8)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x1 |
(c-call VOID "do_break" pc)
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x5 |
(c-call VOID "do_break" pc)
15 14 13 | 12 11 10 9 8 7 6 5 4 3 2 1 0 |
f-op3 | f-addr16cjp |
0x6 | addr16cjp |
(sequence () (c-call VOID "push_pc_stack" pc) (set pc (or QI (sll QI pabits 13) addr16cjp)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x1 | 0x1 | fr |
(sequence () (set fr 0) (set zbit (eq fr 0)))
15 14 13 12 | 11 10 9 | 8 7 6 5 4 3 2 1 0 |
f-op4 | f-bitno | f-reg |
0x8 | bitno | fr |
(set fr (and QI fr (inv INT (sll INT 1 bitno))))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x1 | 0x0 | fr |
(sequence () (set cbit (not BI (sub-cflag QI fr (reg QI h-spr 10) 0))) (set dcbit (not BI (sub-cflag QI (sll QI fr 4) (sll QI (reg QI h-spr 10) 4) 0))) (set zbit (eq (sub QI (reg QI h-spr 10) fr) 0)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x9 | lit8 |
(sequence () (set cbit (not BI (sub-cflag INT lit8 (reg QI h-spr 10) 0))) (set dcbit (not BI (sub-cflag QI (sll QI lit8 4) (sll QI (reg QI h-spr 10) 4) 0))) (set zbit (eq (sub QI (reg QI h-spr 10) lit8) 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x10 | 0x1 | fr |
(if (eq (reg QI h-spr 10) fr) (skip VOID 1))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x7 | lit8 |
(if (eq (reg QI h-spr 10) lit8) (skip VOID 1))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x10 | 0x0 | fr |
(if (not BI (eq (reg QI h-spr 10) fr)) (skip VOID 1))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x6 | lit8 |
(if (not BI (eq (reg QI h-spr 10) lit8)) (skip VOID 1))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x4 |
(c-call VOID "do_clear_wdt")
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x3 | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (sub HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (sub QI fr 1))) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x13 | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (sub HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (sub QI fr 1))) (if (not BI (eq fr 0)) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x13 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (sub QI fr 1)) (if (not BI (eq (reg QI h-spr 10) 0)) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xb | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (sub HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (sub QI fr 1))) (if (eq fr 0) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xb | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (sub QI fr 1)) (if (eq (reg QI h-spr 10) 0) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x3 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (sub QI fr 1)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x3 |
(c-call VOID "do_flash_erase")
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x1b |
(c-call VOID "do_flash_read")
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x1a |
(c-call VOID "do_flash_write")
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xa | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (add HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (add QI fr 1))) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x16 | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (add HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (add QI fr 1))) (if (not BI (eq fr 0)) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x16 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (add QI fr 1)) (if (not BI (eq (reg QI h-spr 10) 0)) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xf | 0x1 | fr |
(sequence ((QI isLreg) (HI 16bval)) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (add HI 16bval 1)) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set fr (reg QI h-spr f-reg))) (set fr (add QI fr 1))) (if (eq fr 0) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xf | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (add QI fr 1)) (if (eq (reg QI h-spr 10) 0) (skip VOID 1)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xa | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (add QI fr 1)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x6 |
(nop)
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x19 |
(c-call VOID "do_insn_read")
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x1d |
(c-call VOID "do_insn_read")
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x18 |
(c-call VOID "do_insn_write")
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x1c |
(c-call VOID "do_insn_write")
15 14 13 | 12 11 10 9 8 7 6 5 4 3 2 1 0 |
f-op3 | f-addr16cjp |
0x7 | addr16cjp |
(set pc (or QI (sll QI pabits 13) addr16cjp))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x0 | addr16h |
(set (reg QI h-spr 12) (and UINT addr16l 65280))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x0 | lit8 |
(set (reg QI h-spr 12) (and INT lit8 255))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x1 | addr16l |
(set (reg QI h-spr 13) (and UINT addr16l 255))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x1 | lit8 |
(set (reg QI h-spr 13) (and INT lit8 255))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x0 | 0x1 | fr |
(set fr (reg QI h-spr 10))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x8 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) fr) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xc | lit8 |
(set (reg QI h-spr 10) lit8)
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x15 | 0x0 | fr |
(sequence ((SI tmp)) (set tmp (mul SI (ext SI (reg QI h-spr 10)) (ext SI fr))) (set (reg QI h-spr 10) (and SI tmp 255)) (set (reg QI h-spr 15) (srl SI tmp 8)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x3 | lit8 |
(sequence ((SI tmp)) (set tmp (mul SI (ext SI (reg QI h-spr 10)) (ext SI (and UQI 255 lit8)))) (set (reg QI h-spr 10) (and SI tmp 255)) (set (reg QI h-spr 15) (srl SI tmp 8)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x14 | 0x0 | fr |
(sequence ((USI tmp)) (set tmp (and INT 65535 (mul USI (zext USI (reg QI h-spr 10)) (zext USI fr)))) (set (reg QI h-spr 10) (and USI tmp 255)) (set (reg QI h-spr 15) (srl USI tmp 8)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x2 | lit8 |
(sequence ((USI tmp)) (set tmp (and INT 65535 (mul USI (zext USI (reg QI h-spr 10)) (zext USI lit8)))) (set (reg QI h-spr 10) (and USI tmp 255)) (set (reg QI h-spr 15) (srl USI tmp 8)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x0 |
(nop)
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x9 | 0x1 | fr |
(sequence () (set fr (inv QI fr)) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x9 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (inv QI fr)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x4 | 0x1 | fr |
(sequence () (set fr (or QI (reg QI h-spr 10) fr)) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x4 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (or QI fr (reg QI h-spr 10))) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xd | lit8 |
(sequence () (set (reg QI h-spr 10) (or QI (reg QI h-spr 10) lit8)) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 | 2 1 0 |
f-op6 | f-op6-7low | f-page3 |
0x0 | 0x2 | addr16p |
(set pabits addr16p)
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x11 | 0x1 | fr |
(sequence () (set fr (c-call QI "pop")) (c-call VOID "adjuststackptr" 1))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x11 | 0x0 | fr |
(sequence () (c-call VOID "push" fr) (c-call VOID "adjuststackptr" -1))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x4 | lit8 |
(sequence () (c-call VOID "push" lit8) (c-call VOID "adjuststackptr" -1))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x7 |
(sequence ((USI new_pc)) (set new_pc (c-call UHI "pop_pc_stack")) (set pabits (srl USI new_pc 13)) (set pc new_pc))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 | 2 1 0 |
f-op6 | f-op6-7low | f-reti3 |
0x0 | 0x1 | reti3 |
(c-call VOID "do_reti" reti3)
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0x2 |
(sequence ((USI new_pc)) (set new_pc (c-call UHI "pop_pc_stack")) (set pc new_pc))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0x8 | lit8 |
(sequence ((USI new_pc)) (set (reg QI h-spr 10) lit8) (set new_pc (c-call UHI "pop_pc_stack")) (set pabits (srl USI new_pc 13)) (set pc new_pc))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xd | 0x1 | fr |
(sequence ((QI newfr) (BI newc)) (set newc (and QI fr 128)) (set newfr (or QI (sll QI fr 1) (if QI cbit 1 0))) (set cbit (if QI newc 1 0)) (set fr newfr))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xd | 0x0 | fr |
(sequence ((QI newfr) (BI newc)) (set newc (and QI fr 128)) (set newfr (or QI (sll QI fr 1) (if QI cbit 1 0))) (set cbit (if QI newc 1 0)) (set (reg QI h-spr 10) newfr))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xc | 0x1 | fr |
(sequence ((QI newfr) (BI newc)) (set newc (and QI fr 1)) (set newfr (or QI (srl QI fr 1) (if QI cbit 128 0))) (set cbit (if QI newc 1 0)) (set fr newfr))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xc | 0x0 | fr |
(sequence ((QI newfr) (BI newc)) (set newc (and QI fr 1)) (set newfr (or QI (srl QI fr 1) (if QI cbit 128 0))) (set cbit (if QI newc 1 0)) (set (reg QI h-spr 10) newfr))
15 14 13 12 | 11 10 9 | 8 7 6 5 4 3 2 1 0 |
f-op4 | f-bitno | f-reg |
0xb | bitno | fr |
(if (and QI fr (sll INT 1 bitno)) (skip VOID 1))
15 14 13 12 | 11 10 9 | 8 7 6 5 4 3 2 1 0 |
f-op4 | f-bitno | f-reg |
0x9 | bitno | fr |
(set fr (or QI fr (sll INT 1 bitno)))
15 14 13 12 | 11 10 9 | 8 7 6 5 4 3 2 1 0 |
f-op4 | f-bitno | f-reg |
0xa | bitno | fr |
(if (not QI (and QI fr (sll INT 1 bitno))) (skip VOID 1))
15 14 13 12 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op8 | f-imm8 |
0x1 | lit8 |
(set (reg QI h-registers 14) lit8)
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x12 | 0x1 | fr |
(sequence ((QI result) (BI newcbit) (QI isLreg) (HI 16bval)) (set newcbit (not BI (sub-cflag QI fr (reg QI h-spr 10) (not BI cbit)))) (set dcbit (not BI (sub-cflag QI (sll QI fr 4) (sll QI (reg QI h-spr 10) 4) (not BI cbit)))) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (subc HI 16bval (reg QI h-spr 10) (not BI cbit))) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set result (reg QI h-spr f-reg))) (set result (subc QI fr (reg QI h-spr 10) (not BI cbit)))) (set zbit (eq result 0)) (set cbit newcbit) (set fr result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x12 | 0x0 | fr |
(sequence ((QI result) (BI newcbit)) (set newcbit (not BI (sub-cflag QI fr (reg QI h-spr 10) (not BI cbit)))) (set dcbit (not BI (sub-cflag QI (sll QI fr 4) (sll QI (reg QI h-spr 10) 4) (not BI cbit)))) (set result (subc QI fr (reg QI h-spr 10) (not BI cbit))) (set zbit (eq result 0)) (set cbit newcbit) (set (reg QI h-spr 10) result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x2 | 0x1 | fr |
(sequence ((QI result) (QI isLreg) (HI 16bval)) (set cbit (not BI (sub-cflag QI fr (reg QI h-spr 10) 0))) (set dcbit (not BI (sub-cflag QI (sll QI fr 4) (sll QI (reg QI h-spr 10) 4) 0))) (sequence () (set isLreg 0) (if (or BI (or BI (eq f-reg 5) (eq f-reg 7)) (or BI (eq f-reg 9) (or BI (eq f-reg 13) (eq f-reg 17)))) (set isLreg 1))) (if (eq isLreg 1) (sequence () (set 16bval (reg QI h-spr (sub UINT f-reg 1))) (set 16bval (sll HI 16bval 8)) (set 16bval (or HI 16bval (and QI (reg QI h-spr f-reg) 255))) (set 16bval (sub HI 16bval (and QI (reg QI h-spr 10) 255))) (set (reg QI h-spr f-reg) (and HI 16bval 255)) (set (reg QI h-spr (sub UINT f-reg 1)) (and HI (srl HI 16bval 8) 255)) (set result (reg QI h-spr f-reg))) (set result (subc QI fr (reg QI h-spr 10) 0))) (set zbit (eq result 0)) (set fr result))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x2 | 0x0 | fr |
(sequence ((QI result)) (set cbit (not BI (sub-cflag QI fr (reg QI h-spr 10) 0))) (set dcbit (not BI (sub-cflag QI (sll QI fr 4) (sll QI (reg QI h-spr 10) 4) 0))) (set result (subc QI fr (reg QI h-spr 10) 0)) (set zbit (eq result 0)) (set (reg QI h-spr 10) result))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xa | lit8 |
(sequence () (set cbit (not BI (sub-cflag INT lit8 (reg QI h-spr 10) 0))) (set dcbit (not BI (sub-cflag QI (sll QI lit8 4) (sll QI (reg QI h-spr 10) 4) 0))) (set zbit (eq (sub QI (reg QI h-spr 10) lit8) 0)) (set (reg QI h-spr 10) (sub INT lit8 (reg QI h-spr 10))))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xe | 0x1 | fr |
(set fr (or QI (and QI (sll QI fr 4) 240) (and QI (srl QI fr 4) 15)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0xe | 0x0 | fr |
(set (reg QI h-spr 10) (or QI (and QI (sll QI fr 4) 240) (and QI (srl QI fr 4) 15)))
15 14 13 12 11 10 | 9 8 7 6 5 4 3 2 1 0 |
f-op6 | f-op6-10low |
0x0 | 0xff |
(c-call VOID "do_system")
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x8 | 0x1 | fr |
(sequence () (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x6 | 0x1 | fr |
(sequence () (set fr (xor QI (reg QI h-spr 10) fr)) (set zbit (eq fr 0)))
15 14 13 12 11 10 | 9 | 8 7 6 5 4 3 2 1 0 |
f-op6 | f-dir | f-reg |
0x6 | 0x0 | fr |
(sequence () (set (reg QI h-spr 10) (xor QI fr (reg QI h-spr 10))) (set zbit (eq (reg QI h-spr 10) 0)))
15 14 13 12 | 11 10 9 8 | 7 6 5 4 3 2 1 0 |
f-op4 | f-op4mid | f-imm8 |
0x7 | 0xf | lit8 |
(sequence () (set (reg QI h-spr 10) (xor QI (reg QI h-spr 10) lit8)) (set zbit (eq (reg QI h-spr 10) 0)))
((emit sb (bitno 0) (fr 11)))
((emit snb (bitno 0) (fr 9)))
((emit sb (bitno 0) (fr 9)))
((emit snb (bitno 0) (fr 11)))
((emit snb (bitno 2) (fr 11)))
((emit sb (bitno 2) (fr 11)))
This documentation was machine generated from the cgen cpu description
files for this architecture.
https://sourceware.org/cgen/