0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x3 |
(sequence () (c-call VOID "check_option_abs" pc) (set rn (abs SI (sub SI rn rm))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 | 14 15 |
f-major | f-rn | f-6s8 | f-sub2 |
0x6 | rn | simm6 | 0x0 |
(set rn (add SI rn (ext SI simm6)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-rl |
0x9 | rn | rm | rl |
(set rl (add SI rn rm))
0 1 2 3 | 4 5 6 7 | 8 | 9 10 11 12 13 | 14 15 |
f-major | f-rn | f-8 | f-7u9a4 | f-sub2 |
0x4 | rn | 0x0 | uimm7a4 | 0x0 |
(set rn (add SI sp (zext SI uimm7a4)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rn | rm | 0x0 | simm16 |
(set rn (add SI rm (ext SI simm16)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x7 |
(if (add-oflag SI rn rm 0) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x1 |
(set rn (and SI rn rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | rm | 0x5 | uimm16 |
(set rn (and SI rm (zext SI uimm16)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x2 |
(sequence () (c-call VOID "check_option_ave" pc) (set rn (sra SI (add SI (add SI rn rm) 1) 1)))
0 1 2 3 | 4 | 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-4 | f-3u5 | f-rm | f-sub4 |
0x2 | 0x0 | uimm3 | rma | 0x1 |
(sequence () (c-call VOID "check_option_bit" pc) (set (mem UQI rma) (and UQI (mem UQI rma) (inv INT (sll INT 1 uimm3)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xd | 0x8 | cccc | 0x7 | pcrel17a2 |
(sequence () (c-call VOID "check_option_cp" pc) (if (eq (and UINT cccc cp_flag) 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xd | 0x8 | cccc | 0x6 | pcrel17a2 |
(sequence () (c-call VOID "check_option_cp" pc) (if (ne (and UINT cccc cp_flag) 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xd | 0x8 | cccc | 0x4 | pcrel17a2 |
(sequence () (c-call VOID "check_option_cp" pc) (if (eq (xor UINT cccc cp_flag) 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xd | 0x8 | cccc | 0x5 | pcrel17a2 |
(sequence () (c-call VOID "check_option_cp" pc) (if (ne (xor UINT cccc cp_flag) 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xe | rn | rm | 0x1 | pcrel17a2 |
(if (eq rn rm) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-4u8 | f-sub4 | f-17s16a2 |
0xe | rn | uimm4 | 0x0 | pcrel17a2 |
(if (eq rn (zext SI uimm4)) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 | 15 |
f-major | f-rn | f-8s8a2 | f-15 |
0xa | rn | pcrel8a2 | 0x0 |
(if (eq rn 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel8a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel8a2 (inv INT 3)))) (else set pc (and INT pcrel8a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-4u8 | f-sub4 | f-17s16a2 |
0xe | rn | uimm4 | 0x8 | pcrel17a2 |
(if (ge rn (zext SI uimm4)) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-4u8 | f-sub4 | f-17s16a2 |
0xe | rn | uimm4 | 0xc | pcrel17a2 |
(if (lt rn (zext SI uimm4)) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xe | rn | rm | 0x5 | pcrel17a2 |
(if (ne rn rm) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-4u8 | f-sub4 | f-17s16a2 |
0xe | rn | uimm4 | 0x4 | pcrel17a2 |
(if (ne rn (zext SI uimm4)) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel17a2 (inv INT 3)))) (else set pc (and INT pcrel17a2 (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 | 15 |
f-major | f-rn | f-8s8a2 | f-15 |
0xa | rn | pcrel8a2 | 0x1 |
(if (ne rn 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel8a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel8a2 (inv INT 3)))) (else set pc (and INT pcrel8a2 (inv INT 1)))))
0 1 2 3 | 4 | 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-4 | f-3u5 | f-rm | f-sub4 |
0x2 | 0x0 | uimm3 | rma | 0x2 |
(sequence () (c-call VOID "check_option_bit" pc) (set (mem UQI rma) (xor UQI (mem UQI rma) (sll INT 1 uimm3))))
0 1 2 3 | 4 5 6 7 8 9 10 11 12 13 14 | 15 |
f-major | f-12s4a2 | f-15 |
0xb | pcrel12a2 | 0x0 |
(cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel12a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel12a2 (inv INT 3)))) (else set pc (and INT pcrel12a2 (inv INT 1))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x3 | 0x2 |
(set pc (c-call USI "break_exception" pc))
0 1 2 3 | 4 | 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-4 | f-3u5 | f-rm | f-sub4 |
0x2 | 0x0 | uimm3 | rma | 0x0 |
(sequence () (c-call VOID "check_option_bit" pc) (set (mem UQI rma) (or UQI (mem UQI rma) (sll INT 1 uimm3))))
0 1 2 3 | 4 5 6 7 8 9 10 11 12 13 14 | 15 |
f-major | f-12s4a2 | f-15 |
0xb | pcrel12a2 | 0x1 |
(sequence () (c-call VOID "cg_profile" pc pcrel12a2) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set lp (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set lp (add USI pc 4))) (else set lp (add USI pc 2))) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel12a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel12a2 (inv INT 3)))) (else set pc (and INT pcrel12a2 (inv INT 1)))))
0 1 2 3 | 4 | 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-major | f-4 | f-24s5a2n | f-sub4 |
0xd | 0x1 | pcrel24a2 | 0x9 |
(sequence () (c-call VOID "cg_profile" pc pcrel24a2) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set lp (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set lp (add USI pc 4))) (else set lp (add USI pc 4))) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and INT pcrel24a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and INT pcrel24a2 (inv INT 3)))) (else set pc (and INT pcrel24a2 (inv INT 1)))))
0 1 2 3 | 4 | 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-major | f-4 | f-24s5a2n | f-sub4 |
0xd | 0x1 | pcrel24a2 | 0xb |
(sequence () (c-call VOID "cg_profile" pc pcrel24a2) (c-call VOID "check_option_cp" pc) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (sequence () (set lp (or USI (add USI pc 8) 1)) (set pc (and INT pcrel24a2 (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (sequence () (set lp (or USI (add USI pc 4) 1)) (set pc (and INT pcrel24a2 (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))))) (else sequence () (set lp (or USI (add USI pc 4) 1)) (if (and SI (srl SI opt 5) 1) (set pc (and INT pcrel24a2 (inv INT 3))) (set pc (and INT pcrel24a2 (inv INT 7)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))))))
0 1 2 3 | 4 | 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-4 | f-3u5 | f-rm | f-sub4 |
0x2 | 0x0 | uimm3 | rma | 0x3 |
(sequence () (c-call VOID "check_option_bit" pc) (set r0 (zext SI (and UQI (mem UQI rma) (sll INT 1 uimm3)))))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x0 | 0x0 | 0x0 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_c0nop" pc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x0 | 0x0 | 0x0 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_c1nop" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | cimm4 | rma | 0x4 |
(c-call VOID "do_cache" cimm4 rma pc)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 | 24 25 26 27 | 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-c5n4 | f-rl5 | f-c5n6 | f-c5n7 |
0xf | rn | rm | 0x1 | 0x2 | rl5 | 0x0 | 0x0 |
(sequence () (c-call VOID "do_casb3" (index-of rl5) rn rm pc) (set rl5 rl5))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 | 24 25 26 27 | 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-c5n4 | f-rl5 | f-c5n6 | f-c5n7 |
0xf | rn | rm | 0x1 | 0x2 | rl5 | 0x0 | 0x1 |
(sequence () (c-call VOID "do_cash3" (index-of rl5) rn rm pc) (set rl5 rl5))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 | 24 25 26 27 | 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-c5n4 | f-rl5 | f-c5n6 | f-c5n7 |
0xf | rn | rm | 0x1 | 0x2 | rl5 | 0x0 | 0x2 |
(sequence () (c-call VOID "do_casw3" (index-of rl5) rn rm pc) (set rl5 rl5))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdadd3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdadd3" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1a | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdcastuw" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1a | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdcastuw" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdcastw" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1b | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdcastw" pc crqp)))
0 1 2 3 | 4 5 | 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-6u6 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | imm6p6 | 0x7 | 0x18 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdclipi3" pc crpc imm6p6)))
0 1 | 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-2u0 | f-ivc2-6u2 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-2 | imm6p2 | 0x15 | crqp | 0x13 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdclipi3" pc crqp imm6p2)))
0 1 2 3 | 4 5 | 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-6u6 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | imm6p6 | 0x7 | 0x18 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdclipiu3" pc crpc imm6p6)))
0 1 | 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-2u0 | f-ivc2-6u2 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-2 | imm6p2 | 0x15 | crqp | 0x12 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdclipiu3" pc crqp imm6p2)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8s4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | simm8p4 | 0x7 | 0x19 | crqc | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdmovi" pc simm8p4)))
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 | 28 29 30 31 |
f-ivc2-simm16p0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-4u28 |
simm16p0 | 0x17 | crqp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cdmovi16" pc simm16p0)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8u4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | imm8p4 | 0x7 | 0x19 | crqc | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdmoviu" pc imm8p4)))
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 | 28 29 30 31 |
f-ivc2-imm16p0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-4u28 |
imm16p0 | 0x17 | crqp | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cdmoviu16" pc imm16p0)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdsll3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x56 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsll3" pc crqp crpp)))
0 1 2 3 | 4 5 | 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-6u6 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | imm6p6 | 0x7 | 0x16 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdslli3" pc crpc imm6p6)))
0 1 | 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-2u0 | f-ivc2-6u2 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-2 | imm6p2 | 0x15 | crqp | 0xb | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdslli3" pc crqp imm6p2)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdsra3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4e | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsra3" pc crqp crpp)))
0 1 2 3 | 4 5 | 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-6u6 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | imm6p6 | 0x7 | 0x15 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdsrai3" pc crpc imm6p6)))
0 1 | 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-2u0 | f-ivc2-6u2 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-2 | imm6p2 | 0x15 | crqp | 0x7 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsrai3" pc crqp imm6p2)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdsrl3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x46 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsrl3" pc crqp crpp)))
0 1 2 3 | 4 5 | 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-6u6 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | imm6p6 | 0x7 | 0x14 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cdsrli3" pc crpc imm6p6)))
0 1 | 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-2u0 | f-ivc2-6u2 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-2 | imm6p2 | 0x15 | crqp | 0x3 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsrli3" pc crqp imm6p2)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cdsub3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x7 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cdsub3" pc crqp crpp)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 | 24 25 26 27 28 | 29 | 30 | 31 |
f-major | f-rn | f-rm | f-sub4 | f-ext | f-5u24 | f-29 | f-30 | f-31 |
0xf | rn | 0x0 | 0x1 | 0x10 | cimm5 | 0x0 | 0x0 | 0x0 |
(sequence ((SI min) (SI max)) (c-call VOID "check_option_clip" pc) (set max (sub INT (sll INT 1 (sub UINT cimm5 1)) 1)) (set min (neg INT (sll INT 1 (sub UINT cimm5 1)))) (cond VOID ((eq cimm5 0) (set rn 0)) ((gt rn max) (set rn max)) ((lt rn min) (set rn min))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 | 24 25 26 27 28 | 29 | 30 | 31 |
f-major | f-rn | f-rm | f-sub4 | f-ext | f-5u24 | f-29 | f-30 | f-31 |
0xf | rn | 0x0 | 0x1 | 0x10 | cimm5 | 0x0 | 0x0 | 0x1 |
(sequence ((SI max)) (c-call VOID "check_option_clip" pc) (set max (sub INT (sll INT 1 cimm5) 1)) (cond VOID ((eq cimm5 0) (set rn 0)) ((gt rn max) (set rn max)) ((lt rn 0) (set rn 0))))
0 1 2 3 | 4 5 6 7 8 | 9 10 11 12 | 13 14 15 16 | 17 18 19 20 | 21 22 23 24 | 25 26 27 28 | 29 | 30 | 31 |
f-major | f-crnx | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-29 | f-30 | f-31 |
0xf | crnx64 | rm | 0x7 | 0xf | 0x0 | 0x0 | 0x0 | 0x0 | 0x0 |
(set crnx64 (or DI (zext DI rm) (and DI crnx64 18446744069414584320)))
0 1 2 3 4 | 5 6 7 8 | 9 10 11 12 13 14 15 16 17 18 19 20 | 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-crnx | f-ivc2-crm | f-ivc2-cmov1 | f-21 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2crn | ivc2rm | 0xf00 | 0x0 | 0x0 | 0x0 |
(set ivc2crn ivc2rm)
0 1 2 3 | 4 5 6 7 8 | 9 10 11 12 | 13 14 15 16 | 17 18 19 20 | 21 22 23 24 | 25 26 27 28 | 29 | 30 | 31 |
f-major | f-crnx | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-29 | f-30 | f-31 |
0xf | crnx64 | rm | 0x7 | 0xf | 0x0 | 0x0 | 0x0 | 0x0 | 0x1 |
(set rm crnx64)
0 1 2 3 4 | 5 6 7 8 | 9 10 11 12 13 14 15 16 17 18 19 20 | 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-crnx | f-ivc2-crm | f-ivc2-cmov1 | f-21 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2crn | ivc2rm | 0xf00 | 0x0 | 0x10 | 0x0 |
(set ivc2rm ivc2crn)
0 1 2 3 | 4 5 6 7 8 9 | 10 11 12 13 | 14 15 16 17 | 18 19 20 21 | 22 23 24 25 | 26 27 28 29 | 30 | 31 |
f-major | f-ivc2-ccrn-c3 | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-30 | f-31 |
0xf | ivc2c3ccrn | rm | 0x7 | 0xf | 0x0 | 0x0 | 0x1 | 0x0 |
(set ivc2c3ccrn rm)
0 1 2 3 4 5 | 6 7 8 9 | 10 11 12 13 14 15 16 17 18 19 20 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-ccrn | f-ivc2-crm | f-ivc2-cmov1 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2ccrn | ivc2rm | 0xf00 | 0x20 | 0x0 |
(set ivc2ccrn ivc2rm)
0 1 2 3 | 4 5 6 7 8 9 | 10 11 12 13 | 14 15 16 17 | 18 19 20 21 | 22 23 24 25 | 26 27 28 29 | 30 | 31 |
f-major | f-ivc2-ccrn-c3 | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-30 | f-31 |
0xf | ivc2c3ccrn | rm | 0x7 | 0xf | 0x0 | 0x0 | 0x1 | 0x1 |
(set rm ivc2c3ccrn)
0 1 2 3 4 5 | 6 7 8 9 | 10 11 12 13 14 15 16 17 18 19 20 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-ccrn | f-ivc2-crm | f-ivc2-cmov1 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2ccrn | ivc2rm | 0xf00 | 0x30 | 0x0 |
(set ivc2rm ivc2ccrn)
0 1 2 3 | 4 5 6 7 8 | 9 10 11 12 | 13 14 15 16 | 17 18 19 20 | 21 22 23 24 | 25 26 27 28 | 29 | 30 | 31 |
f-major | f-crnx | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-29 | f-30 | f-31 |
0xf | crnx64 | rm | 0x7 | 0xf | 0x1 | 0x0 | 0x0 | 0x0 | 0x0 |
(set crnx64 (or DI (sll DI (zext DI rm) 32) (and DI crnx64 4294967295)))
0 1 2 3 4 | 5 6 7 8 | 9 10 11 12 13 14 15 16 17 18 19 20 | 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-crnx | f-ivc2-crm | f-ivc2-cmov1 | f-21 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2crn | ivc2rm | 0xf10 | 0x0 | 0x0 | 0x0 |
(set ivc2crn (or DI (sll DI (zext DI ivc2rm) 32) (and DI ivc2crn 4294967295)))
0 1 2 3 | 4 5 6 7 8 | 9 10 11 12 | 13 14 15 16 | 17 18 19 20 | 21 22 23 24 | 25 26 27 28 | 29 | 30 | 31 |
f-major | f-crnx | f-rm | f-sub4 | f-ivc2-4u16 | f-ivc2-4u20 | f-ivc2-4u24 | f-29 | f-30 | f-31 |
0xf | crnx64 | rm | 0x7 | 0xf | 0x1 | 0x0 | 0x0 | 0x0 | 0x1 |
(set rm (srl DI crnx64 32))
0 1 2 3 4 | 5 6 7 8 | 9 10 11 12 13 14 15 16 17 18 19 20 | 21 | 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-crnx | f-ivc2-crm | f-ivc2-cmov1 | f-21 | f-ivc2-cmov2 | f-ivc2-cmov3 |
ivc2crn | ivc2rm | 0xf10 | 0x0 | 0x10 | 0x0 |
(set ivc2rm (srl DI ivc2crn 32))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0xb | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabs3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x21 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabs3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0xb | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabs3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x22 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabs3_h" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpabsa0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpabsa0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x11 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsa1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsa1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x10 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsa1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsa1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpabsla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x13 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpabsla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpabsla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0xb | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabsu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x20 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabsu3_b" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpabsua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x12 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpabsua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabsz_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabsz_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabsz_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x2 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabsz_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpabsz_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x3 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpabsz_w" pc crqp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x11 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpaccpa0" pc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x11 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpaccpa1" pc))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpeq_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpeq_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x3 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpeq_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpeq_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x5 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpeq_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpeq_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x19 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpge_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x19 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpge_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1b | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpge_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpge_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1d | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpge_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpge_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x18 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgeu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x18 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgeu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1c | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgeu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgeu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x11 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgt_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgt_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x13 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgt_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgt_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x15 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgt_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgt_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x10 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgtu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgtu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x14 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpgtu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpgtu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x9 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpne_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpne_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0xb | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpne_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpne_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0xd | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpacmpne_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x13 | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpacmpne_w" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x10 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpacsuma0" pc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x10 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpacsuma1" pc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x12 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpacswp" pc))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpadd3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpadd3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpadd3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x2 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpadd3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpadd3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x3 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpadd3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpadda0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpadda0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpadda1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpadda1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpadda1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpadda1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpaddaca0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpaddaca0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x5 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddaca1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddaca1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x4 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddaca1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddaca1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpaddacla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x7 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddacla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddacla1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpaddacua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x6 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddacua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpaddacua1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpaddla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x3 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpaddla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpaddla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpaddsr3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1d | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpaddsr3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpaddsr3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1e | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpaddsr3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpaddsr3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1f | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpaddsr3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpaddsru3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1c | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpaddsru3_b" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpaddua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x2 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpaddua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpaddua1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpamadia1_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpamadia1u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpamadila1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpamadiua1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpamulia1_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpamulia1u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpamulila1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpamuliua1_h" pc crqp crpp simm8p0))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpand3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x24 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpand3" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpave3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x19 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpave3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpave3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1a | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpave3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpave3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1b | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpave3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0xa | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpaveu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x18 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpaveu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpbcast_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xd | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpbcast_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpbcast_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xe | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpbcast_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpbcast_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xf | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpbcast_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x19 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcastb_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x19 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcastb_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcastb_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1d | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcastb_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1f | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcasth_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1f | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcasth_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x18 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcastub_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x18 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcastub_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcastub_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1c | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcastub_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x1e | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpcastuh_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x1e | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpcastuh_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpccadd_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xc | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cpccadd_b" pc crqp)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-1 | imm5p7 | 0x7 | 0x18 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpclipi3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0x11 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpclipi3_w" pc crqp imm5p3)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | ivc-x-6-1 | imm5p7 | 0x7 | 0x18 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpclipiu3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0x10 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpclipiu3_w" pc crqp imm5p3)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x3 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x5 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeq_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeqz_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpeqz_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x19 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x19 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1b | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1d | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpge_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x18 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgeu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x18 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgeu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1c | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgeu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgeu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x11 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x13 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x15 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgt_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x10 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgtu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgtu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x14 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgtu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpgtu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x9 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xb | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xd | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x12 | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpcmpne_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextl_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x15 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextl_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextl_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x17 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextl_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextladd3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x13 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextladd3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextladdu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x12 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextladdu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextlsub3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x17 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextlsub3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextlsubu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x16 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextlsubu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextlu_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x14 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextlu_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextlu_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x16 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextlu_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextu_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x11 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextu_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextu_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x13 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextu_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextuadd3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x11 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextuadd3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextuaddu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x10 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextuaddu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextusub3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x15 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextusub3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x9 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextusubu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x14 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextusubu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextuu_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x10 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextuu_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpextuu_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x12 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpextuu_h" pc crqp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfaca0s0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfaca0s0u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfaca0s1_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfaca0s1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfacla0s0_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfacla0s1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfacua0s0_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpfacua0s1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1d | crqp | crpp | 0x1 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1_b" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1s0_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1s0u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1s1_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1s1u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1d | crqp | crpp | 0x0 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadia1u_b" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1d | crqp | crpp | 0x3 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadila1_h" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadila1s0_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadila1s1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1d | crqp | crpp | 0x2 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadiua1_h" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadiua1s0_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpfmadiua1s1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1c | crqp | crpp | 0x1 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1_b" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1s0_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1s0u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1s1_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1s1u_b" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1c | crqp | crpp | 0x0 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmulia1u_b" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1c | crqp | crpp | 0x3 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpfmulila1_h" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpfmulila1s0_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpfmulila1s1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 | 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-2u23 | f-ivc2-3u25 | f-ivc2-4u28 |
simm8p0 | 0x1c | crqp | crpp | 0x2 | imm3p25 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmuliua1_h" pc crqp crpp imm3p25 simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmuliua1s0_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8s0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
simm8p0 | 0x1f | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpfmuliua1s1_h" pc crqp crpp simm8p0))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftba0s0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftba0s0u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftba0s1_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftba0s1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | imm3p4 | croc | 0x7 | 0x1d | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpfsftbi" pc crqc crpc imm3p4)))
0 1 2 3 4 | 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-5u0 | f-ivc2-3u5 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-5 | imm3p5 | 0x8 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpfsftbi" pc crqp crpp imm3p5)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpfsftbla0s0_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpfsftbla0s1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpfsftbs0" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0xc | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpfsftbs0" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpfsftbs1" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0xd | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpfsftbs1" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftbua0s0_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1f | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpfsftbua0s1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cphadd_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x9 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cphadd_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cphadd_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xa | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cphadd_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cphadd_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0xb | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cphadd_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cphaddu_b" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x8 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cphaddu_b" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpldz_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x4 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpldz_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpldz_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x5 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpldz_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x11 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmada1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmada1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x10 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmada1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmada1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x13 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x17 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x15 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadla1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x12 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x16 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x14 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmadua1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0xc | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmax3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x31 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmax3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0xc | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmax3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x33 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmax3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0xc | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmax3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x35 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmax3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0xc | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmaxu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x30 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmaxu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0xc | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmaxu3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x34 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmaxu3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0xd | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmin3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x39 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmin3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0xd | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmin3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3b | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmin3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0xd | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmin3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3d | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmin3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0xd | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpminu3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x38 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpminu3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0xd | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpminu3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3c | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpminu3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmov" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x0 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmov" pc crqp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmova0_b" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmova1_b" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmova1_b" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x10 | 0x0 | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovfrcc" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | 0x0 | 0x1 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovfrcc" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x10 | 0x0 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovfrcsar0" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | 0x0 | 0x0 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovfrcsar0" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x10 | 0x0 | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovfrcsar1" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | 0x0 | 0xf | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovfrcsar1" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xf | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovhla0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x17 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovhla1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xf | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovhla1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xe | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovhua0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x16 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovhua1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xe | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovhua1_w" pc)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8s4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | simm8p4 | 0x7 | 0x19 | crqc | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpmovi_b" pc simm8p4)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 | 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-8u20 | f-ivc2-4u28 |
0x0 | 0x16 | crqp | 0x0 | imm8p20 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cpmovi_b" pc simm8p20)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8s4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | simm8p4 | 0x7 | 0x19 | crqc | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpmovi_h" pc simm8p4)))
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 | 28 29 30 31 |
f-ivc2-simm16p0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-4u28 |
simm16p0 | 0x16 | crqp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cpmovi_h16" pc simm16p0)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8s4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | simm8p4 | 0x7 | 0x19 | crqc | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpmovi_w" pc simm8p4)))
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 | 28 29 30 31 |
f-ivc2-simm16p0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-4u28 |
simm16p0 | 0x17 | crqp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cpmovi_w16" pc simm16p0)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8u4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | imm8p4 | 0x7 | 0x19 | crqc | 0x2 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpmoviu_h" pc imm8p4)))
0 1 2 3 | 4 5 6 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-8u4 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | imm8p4 | 0x7 | 0x19 | crqc | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpmoviu_w" pc imm8p4)))
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 | 28 29 30 31 |
f-ivc2-imm16p0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-2u18 | f-ivc2-4u28 |
imm16p0 | 0x17 | crqp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqp (c-call DI "ivc2_cpmoviu_w16" pc imm16p0)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x3 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovla0_h" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x3 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovla1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x3 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovla1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x7 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovlla0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x7 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovlla1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x7 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovlla1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x6 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovlua0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x6 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovlua1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x6 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovlua1_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x10 | crqc | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpmovtocc" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | crqp | 0x11 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpmovtocc" pc crqp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x10 | crqc | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_csar0 0) (c-call VOID "ivc2_cpmovtocsar0" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | crqp | 0x10 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_csar0 0) (c-call VOID "ivc2_cpmovtocsar0" pc crqp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x10 | crqc | 0x1f | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_csar1 0) (c-call VOID "ivc2_cpmovtocsar1" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x11 | crqp | 0x1f | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_csar1 0) (c-call VOID "ivc2_cpmovtocsar1" pc crqp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x2 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovua0_h" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x2 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovua1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x2 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovua1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x5 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovula0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x5 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovula1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x5 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovula1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x4 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovuua0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x4 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpmovuua1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x4 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpmovuua1_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1b | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1f | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1f | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1d | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbla1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1a | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1a | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1e | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1e | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1c | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmsbua1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x9 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmula1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmula1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x8 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmula1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmula1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xb | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xf | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xd | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpmulla1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xb | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2 | 0x1e | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xf | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2 | 0x1e | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xa | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2 | 0x1e | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xe | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2 | 0x1e | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpmulslua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xa | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xe | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xc | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1u_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpmulua1u_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpnor3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x26 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpnor3" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x6 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpnorm_h" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x6 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpnorm_h" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x11 | crqc | 0x7 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpnorm_w" pc crqc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x10 | crqp | 0x7 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpnorm_w" pc crqp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x1 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpeq_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpeq_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x3 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpeq_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x3 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpeq_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x5 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpeq_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpeq_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x19 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpge_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x19 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpge_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x1b | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpge_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpge_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x1d | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpge_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpge_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x18 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgeu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x18 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgeu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x1c | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgeu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgeu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x11 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgt_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x11 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgt_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x13 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgt_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgt_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x15 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgt_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgt_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x10 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgtu_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x10 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgtu_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x14 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpgtu_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpgtu_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0x9 | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpne_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpne_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xb | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpne_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpne_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | 0xd | 0x7 | 0x12 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cc 0) (c-call VOID "ivc2_cpocmpne_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x13 | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "ivc2_cpocmpne_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpor3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x25 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpor3" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x3 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppack_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2d | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppack_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0x3 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppack_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2f | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppack_h" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x9 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppacka0_b" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x8 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppacka0u_b" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x11 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppacka1_b" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x9 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppacka1_b" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x10 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppacka1u_b" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x8 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppacka1u_b" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xb | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackla0_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xd | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackla0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x13 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppackla1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xb | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackla1_h" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x15 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppackla1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xd | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackla1_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x3 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppacku_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x2c | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppacku_b" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xa | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackua0_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xc | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackua0_w" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x12 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppackua1_h" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xa | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackua1_h" pc)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | 0x0 | 0x14 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cppackua1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0xc | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cppackua1_w" pc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsada0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsada0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x15 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsada1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x15 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsada1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x14 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsada1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x14 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsada1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x8 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsadd3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0xa | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsadd3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x8 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsadd3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0xb | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsadd3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsadla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x17 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsadla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsadla1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsadua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x16 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsadua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsadua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsel" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x4 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsel" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpseta0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x0 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpseta1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpseta1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpsetla0_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x3 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpsetla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1d | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpsetla1_w" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsetua0_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x2 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsetua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x1c | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsetua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x7 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsla3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x5a | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsla3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x7 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsla3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x5c | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsla3_w" pc crqp crpp)))
0 1 2 3 | 4 5 | 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-2u6 | f-ivc2-4u8 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-2 | imm4p8 | 0x7 | 0x17 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpslai3_h" pc crpc imm4p8)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-4u0 | f-ivc2-4u4 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-4 | imm4p4 | 0x15 | crqp | 0xd | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpslai3_h" pc crqp imm4p4)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | ivc-x-6-1 | imm5p7 | 0x7 | 0x17 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpslai3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0xe | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpslai3_w" pc crqp imm5p3)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsll3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x50 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsll3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsll3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x52 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsll3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsll3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x54 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsll3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x1a | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpslla0" pc crqp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x2 | 0x7 | 0x2 | crqc | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpslla1" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x1a | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpslla1" pc crqp))
0 1 2 3 | 4 5 | 6 7 8 | 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-3u6 | f-ivc2-3u9 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | ivc-x-6-3 | imm3p9 | 0x7 | 0x16 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpslli3_b" pc crpc imm3p9)))
0 1 2 3 4 | 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-5u0 | f-ivc2-3u5 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-5 | imm3p5 | 0x15 | crqp | 0x8 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpslli3_b" pc crqp imm3p5)))
0 1 2 3 | 4 5 | 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-2u6 | f-ivc2-4u8 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-2 | imm4p8 | 0x7 | 0x16 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpslli3_h" pc crpc imm4p8)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-4u0 | f-ivc2-4u4 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-4 | imm4p4 | 0x15 | crqp | 0x9 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpslli3_h" pc crqp imm4p4)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | ivc-x-6-1 | imm5p7 | 0x7 | 0x16 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpslli3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0xa | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpslli3_w" pc crqp imm5p3)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1e | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsllia0" pc imm5p23))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1e | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsllia1" pc imm5p23))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | ivc-x-6-1 | imm5p7 | 0x7 | 0x3 | 0x0 | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsllia1" pc imm5p7))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x13 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x17 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x13 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x13 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x17 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x17 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x12 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x16 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadslua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x12 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x12 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x16 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x16 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmadua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1b | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1f | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x1f | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x1b | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x1b | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslla1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x1f | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslla1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x1f | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslla1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x1a | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x1a | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | 0x1e | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x3 | 0x1e | crqp | crpp | 0x1e | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbslua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1a | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x1a | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | 0x1e | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbua1_w" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x1 | 0x1e | crqp | crpp | 0x1e | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsmsbua1_w" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsra3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x48 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsra3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsra3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4a | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsra3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsra3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4c | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsra3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x19 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsraa0" pc crqp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1 | 0x7 | 0x2 | crqc | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsraa1" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x19 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsraa1" pc crqp))
0 1 2 3 | 4 5 | 6 7 8 | 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-3u6 | f-ivc2-3u9 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | ivc-x-6-3 | imm3p9 | 0x7 | 0x15 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrai3_b" pc crpc imm3p9)))
0 1 2 3 4 | 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-5u0 | f-ivc2-3u5 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-5 | imm3p5 | 0x15 | crqp | 0x4 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrai3_b" pc crqp imm3p5)))
0 1 2 3 | 4 5 | 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-2u6 | f-ivc2-4u8 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-2 | imm4p8 | 0x7 | 0x15 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrai3_h" pc crpc imm4p8)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-4u0 | f-ivc2-4u4 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-4 | imm4p4 | 0x15 | crqp | 0x5 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrai3_h" pc crqp imm4p4)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | ivc-x-6-1 | imm5p7 | 0x7 | 0x15 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrai3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0x6 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrai3_w" pc crqp imm5p3)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1d | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsraia0" pc imm5p23))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1d | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsraia1" pc imm5p23))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-1 | imm5p7 | 0x7 | 0x3 | 0x0 | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsraia1" pc imm5p7))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsrl3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x40 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrl3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsrl3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x42 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrl3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsrl3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x44 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrl3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x18 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsrla0" pc crqp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x2 | crqc | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsrla1" pc crqc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | crqp | 0x18 | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsrla1" pc crqp))
0 1 2 3 | 4 5 | 6 7 8 | 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-3u6 | f-ivc2-3u9 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | ivc-x-6-3 | imm3p9 | 0x7 | 0x14 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrli3_b" pc crpc imm3p9)))
0 1 2 3 4 | 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-5u0 | f-ivc2-3u5 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-5 | imm3p5 | 0x15 | crqp | 0x0 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrli3_b" pc crqp imm3p5)))
0 1 2 3 | 4 5 | 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-2u6 | f-ivc2-4u8 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | ivc-x-6-2 | imm4p8 | 0x7 | 0x14 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrli3_h" pc crpc imm4p8)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-4u0 | f-ivc2-4u4 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-4 | imm4p4 | 0x15 | crqp | 0x1 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrli3_h" pc crqp imm4p4)))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | ivc-x-6-1 | imm5p7 | 0x7 | 0x14 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crqc (c-call DI "ivc2_cpsrli3_w" pc crpc imm5p7)))
0 1 2 | 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-3u0 | f-ivc2-5u3 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
ivc-x-0-3 | imm5p3 | 0x15 | crqp | 0x2 | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsrli3_w" pc crqp imm5p3)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1c | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsrlia0" pc imm5p23))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x19 | 0x0 | 0x1c | imm5p23 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsrlia1" pc imm5p23))
0 1 2 3 | 4 5 | 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-2u4 | f-ivc2-1u6 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | ivc-x-6-1 | imm5p7 | 0x7 | 0x3 | 0x0 | 0x0 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsrlia1" pc imm5p7))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x5 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpssda1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x5 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssda1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x4 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpssda1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x4 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssda1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssll3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x51 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssll3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssll3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x53 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssll3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x6 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssll3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x55 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssll3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x1 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssqa1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssqa1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x0 | 0x7 | 0x1 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssqa1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x1e | crqp | crpp | 0x0 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpssqa1u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssra3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x49 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssra3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssra3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4b | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssra3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x5 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssra3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4d | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssra3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssrl3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x41 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssrl3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssrl3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x43 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssrl3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x4 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpssrl3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x45 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpssrl3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x8 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cofr0 0) (set croc (c-call DI "ivc2_cpssub3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0xe | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cofr0 0) (set crop (c-call DI "ivc2_cpssub3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x7 | croc | 0x7 | 0x8 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cofr0 0) (set croc (c-call DI "ivc2_cpssub3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0xf | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_cofr0 0) (set crop (c-call DI "ivc2_cpssub3_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsub3_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x4 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsub3_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsub3_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x5 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsub3_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x0 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpsub3_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x6 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpsub3_w" pc crqp crpp)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsuba0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsuba0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x9 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsuba1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x9 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsuba1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0x8 | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsuba1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0x8 | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsuba1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsubaca0_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsubaca0u_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xd | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubaca1_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xd | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubaca1_b" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xc | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubaca1u_b" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubaca1u_b" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsubacla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xf | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubacla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xf | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubacla1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (set ivc2_cofa0 0) (c-call VOID "ivc2_cpsubacua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xe | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubacua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xe | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (set ivc2_cofa1 0) (c-call VOID "ivc2_cpsubacua1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_0 0) (set ivc2_acc0_1 0) (set ivc2_acc0_2 0) (set ivc2_acc0_3 0) (c-call VOID "ivc2_cpsubla0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xb | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpsubla1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xb | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_0 0) (set ivc2_acc1_1 0) (set ivc2_acc1_2 0) (set ivc2_acc1_3 0) (c-call VOID "ivc2_cpsubla1_h" pc crqp crpp))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc0_4 0) (set ivc2_acc0_5 0) (set ivc2_acc0_6 0) (set ivc2_acc0_7 0) (c-call VOID "ivc2_cpsubua0_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | 0xa | 0x7 | 0x0 | crqc | crpc | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsubua1_h" pc crqc crpc))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x18 | crqp | crpp | 0xa | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set ivc2_acc1_4 0) (set ivc2_acc1_5 0) (set ivc2_acc1_6 0) (set ivc2_acc1_7 0) (c-call VOID "ivc2_cpsubua1_h" pc crqp crpp))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x4 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpackl_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x9 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpackl_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x5 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpackl_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0xa | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpackl_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x6 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpackl_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0xb | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpackl_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x0 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpacku_b" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x5 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpacku_b" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x1 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpacku_h" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x6 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpacku_h" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x2 | croc | 0x7 | 0x2 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpunpacku_w" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x0 | 0x7 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpunpacku_w" pc crqp crpp)))
0 1 2 3 | 4 5 6 | 7 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 | 21 22 23 24 25 | 26 27 28 29 30 | 31 |
f-major | f-ivc2-3u4 | f-ivc2-5u7 | f-sub4 | f-ivc2-5u16 | f-ivc2-5u21 | f-ivc2-5u26 | f-ivc2-1u31 |
0xf | 0x3 | croc | 0x7 | 0x1 | crqc | crpc | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set croc (c-call DI "ivc2_cpxor3" pc crqc crpc)))
0 1 2 3 4 5 6 7 | 8 9 10 11 12 | 13 14 15 16 17 | 18 19 20 21 22 | 23 24 25 26 27 | 28 29 30 31 |
f-ivc2-8u0 | f-ivc2-5u8 | f-ivc2-5u13 | f-ivc2-5u18 | f-ivc2-5u23 | f-ivc2-4u28 |
0x27 | 0x14 | crqp | crpp | crop | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (set crop (c-call DI "ivc2_cpxor3" pc crqp crpp)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x3 | 0x3 |
(sequence () (c-call VOID "check_option_debug" pc) (set dbg (or SI dbg 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x0 | 0x0 |
(set psw (sll SI (srl SI psw 1) 1))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x8 |
(sequence () (c-call VOID "check_option_div" pc) (if (eq rm 0) (set pc (c-call USI "zdiv_exception" pc)) (if (and BI (eq rn 2147483648) (eq rm 4294967295)) (sequence () (set lo 2147483648) (set hi 0)) (sequence () (set lo (div SI rn rm)) (set hi (mod SI rn rm))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x9 |
(sequence () (c-call VOID "check_option_div" pc) (if (eq rm 0) (set pc (c-call USI "zdiv_exception" pc)) (sequence () (set lo (udiv SI rn rm)) (set hi (umod SI rn rm)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x1 | 0x3 |
(sequence () (c-call VOID "check_option_debug" pc) (set dbg (and SI dbg (inv SI (sll SI 1 15)))) (set pc depc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x0 | uimm16 |
(set rn (c-call SI "do_DSP" rn rm (zext SI uimm16) pc))
0 1 2 3 | 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-major | f-c5-rnmuimm24 | f-sub4 |
0xf | c5rnmuimm24 | 0x0 |
(c-call VOID "do_DSP" (zext SI c5rnmuimm24) pc)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-major | f-rn | f-c5-rmuimm20 | f-sub4 |
0xf | rn | c5rmuimm20 | 0x0 |
(set rn (c-call SI "do_DSP" rn (zext SI c5rmuimm20) pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x1 | 0x0 |
(set psw (or SI psw 1))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xe | 0x0 | 0x1 | 0x9 | pcrel17a2 |
(sequence () (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set (reg SI h-csr 4) (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set (reg SI h-csr 4) (add USI pc 4))) (else set (reg SI h-csr 4) (add USI pc 4))) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 3)))) (else set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 1)))) (set (raw-reg SI h-csr 5) (or SI (and SI (raw-reg SI h-csr 5) (inv INT (sll INT 1 0))) (and INT (sll INT 1 0) (sll INT 1 0)))) (set (reg SI h-csr 6) 1))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | 0x0 | 0xd |
(set rn (ext SI (and QI rn 255)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | 0x2 | 0xd |
(set rn (ext SI (and HI rn 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | 0x8 | 0xd |
(set rn (zext SI (and SI rn 255)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | 0xa | 0xd |
(set rn (zext SI (and SI rn 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xf |
(sequence ((DI temp) (QI shamt)) (set shamt (and SI sar 63)) (set temp (sll DI (or DI (sll DI (zext DI rn) 32) (zext DI rm)) shamt)) (set rn (subword SI (srl DI temp 32) 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x2 | 0x2 |
(set (raw-reg SI h-csr 16) (or SI psw (sll INT 1 11)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | 0x0 | rm | 0xe |
(sequence () (if (eq (and SI (srl SI psw 12) 1) 0) (if (and SI rm 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI rm (inv INT 3))) (set pc (and SI rm (inv INT 7))))) (set pc (and SI rm (inv INT 1)))) (if (and SI rm 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))) (set pc (and SI rm (inv INT 1)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI rm (inv INT 3))) (set pc (and SI rm (inv INT 7)))))) (c-call VOID "cg_profile_jump" pc rm))
0 1 2 3 | 4 | 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | 28 29 30 31 |
f-major | f-4 | f-24u5a2n | f-sub4 |
0xd | 0x1 | pcabs24a2 | 0x8 |
(sequence () (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and USI (or USI (and USI pc 4026531840) pcabs24a2) (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and USI (or USI (and USI pc 4026531840) pcabs24a2) (inv INT 3)))) (else set pc (and USI (or USI (and USI pc 4026531840) pcabs24a2) (inv INT 1)))) (c-call VOID "cg_profile_jump" pc pcabs24a2))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | 0x0 | rm | 0xf |
(sequence () (c-call VOID "cg_profile" pc rm) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set lp (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set lp (add USI pc 4))) (else set lp (add USI pc 2))) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set pc (and SI rm (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set pc (and SI rm (inv INT 3)))) (else set pc (and SI rm (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | 0x8 | rm | 0xf |
(sequence () (c-call VOID "cg_profile" pc rm) (c-call VOID "check_option_cp" pc) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (sequence () (set lp (or USI (add USI pc 8) 1)) (set pc (and SI rm (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (sequence () (set lp (or USI (add USI pc 4) 1)) (set pc (and SI rm (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))))) (else sequence () (set lp (or USI (add USI pc 2) 1)) (if (and SI (srl SI opt 5) 1) (set pc (and SI rm (inv INT 3))) (set pc (and SI rm (inv INT 7)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnc | rma | 0xc |
(set rnc (ext SI (mem QI rma)))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9 |
0x8 | 0x1 | rn3c | 0x0 | udisp7 |
(set rn3c (ext SI (mem QI (add SI (zext SI udisp7) tp))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnc | rma | 0xc | sdisp16 |
(set rnc (ext SI (mem QI (add SI rma (ext SI sdisp16)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0x4 | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem QI (add SI rma (ext SI cdisp12))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x4 | 0x0 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem QI rma))) (set rma (add SI rma (ext SI cdisp10))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x4 | 0x2 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem QI rma))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x4 | 0x3 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem QI rma))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnuc | rma | 0xb |
(set rnuc (zext SI (mem UQI rma)))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9 |
0x4 | 0x1 | rn3uc | 0x1 | udisp7 |
(set rn3uc (zext SI (mem QI (add SI (zext SI udisp7) tp))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnuc | rma | 0xb | sdisp16 |
(set rnuc (zext SI (mem QI (add SI rma (ext SI sdisp16)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0xc | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem QI (add SI rma (ext SI cdisp12))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xc | 0x0 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem QI rma))) (set rma (add SI rma cdisp10)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xc | 0x2 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem QI rma))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xc | 0x3 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem QI rma))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn | f-12 | f-13 | f-14 |
0x7 | rn | csrn | 0x1 | 0x0 | 0x1 |
(if (eq f-csrn 0) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set rn (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set rn (add USI pc 4))) (else set rn (add USI pc 2))) (set rn csrn))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x7 | 0x1 | 0x0 | 0x1 | 0x0 |
(set rn hi)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x8 | 0x1 | 0x0 | 0x1 | 0x0 |
(set rn lo)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x1 | 0x1 | 0x0 | 0x1 | 0x0 |
(set rn lp)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | 0x1 | 0x4 | uimm16 |
(set rn (c-call SI "do_ldcb" uimm16))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | rn | rma | 0xd |
(set rn (c-call SI "do_ldcb" (and SI rma 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x0 |
(sequence () (c-call VOID "check_option_ldz" pc) (set rn (c-call SI "do_ldz" rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rns | rma | 0xd |
(set rns (ext SI (mem HI (and SI rma (inv INT 1)))))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 | 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9a2 | f-15 |
0x8 | 0x1 | rn3s | 0x1 | udisp7a2 | 0x0 |
(set rn3s (ext SI (mem HI (and SI (add SI (zext SI udisp7a2) tp) (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rns | rma | 0xd | sdisp16 |
(set rns (ext SI (mem HI (and SI (add SI rma (ext SI sdisp16)) (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0x5 | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem HI (add SI rma (ext SI cdisp12))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x5 | 0x0 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem HI (and SI rma (inv SI 1))))) (set rma (add SI rma (ext SI cdisp10a2))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x5 | 0x2 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem HI (and SI rma (inv SI 1))))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x5 | 0x3 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem HI (and SI rma (inv SI 1))))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnus | rma | 0xf |
(set rnus (zext SI (mem UHI (and SI rma (inv INT 1)))))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 | 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9a2 | f-15 |
0x8 | 0x1 | rn3us | 0x1 | udisp7a2 | 0x1 |
(set rn3us (zext SI (mem HI (and SI (add SI (zext SI udisp7a2) tp) (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnus | rma | 0xf | sdisp16 |
(set rnus (zext SI (mem HI (and SI (add SI rma (ext SI sdisp16)) (inv INT 1)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0xd | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem HI (add SI rma (ext SI cdisp12))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xd | 0x0 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem HI (and SI rma (inv SI 1))))) (set rma (add SI rma (ext SI cdisp10a2))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xd | 0x2 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem HI (and SI rma (inv SI 1))))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0xd | 0x3 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (zext SI (mem HI (and SI rma (inv SI 1))))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn64 | rma | 0xb |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcp" rma pc)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-16s16 |
0xf | crn64 | rma | 0xf | sdisp16 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcp16" rma sdisp16 pc)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x7 | 0x0 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcpa" (index-of rma) cdisp10a8 pc)) (set rma rma))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn64 | rma | 0x3 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcpi" (index-of rma) pc)) (set rma rma))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x7 | 0x2 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcp" rma pc)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a8))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x7 | 0x3 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (set crn64 (c-call DI "do_lmcp" rma pc)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a8))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnl | rma | 0xe |
(set rnl (mem SI (and SI rma (inv INT 3))))
0 1 2 3 | 4 5 6 7 | 8 | 9 10 11 12 13 | 14 15 |
f-major | f-rn | f-8 | f-7u9a4 | f-sub2 |
0x4 | rnl | 0x0 | udisp7a4 | 0x3 |
(set rnl (mem SI (and UINT (add UINT udisp7a4 sp) (inv INT 3))))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 | 14 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9a4 | f-sub2 |
0x4 | 0x0 | rn3l | 0x1 | udisp7a4 | 0x3 |
(set rn3l (mem SI (and SI (add SI (zext SI udisp7a4) tp) (inv INT 3))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnl | rma | 0xe | sdisp16 |
(set rnl (mem SI (and SI (add SI rma (ext SI sdisp16)) (inv INT 3))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 | 30 31 |
f-major | f-rn | f-24u8a4n | f-sub2 |
0xe | rnl | addr24a4 | 0x3 |
(set rnl (mem SI (zext SI addr24a4)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn | rma | 0x9 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (mem SI (and SI rma (inv SI 3)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-16s16 |
0xf | crn | rma | 0xd | sdisp16 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (mem SI (and SI (add SI rma sdisp16) (inv SI 3)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x6 | 0x0 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (mem SI (and SI rma (inv SI 3)))) (set rma (add SI rma (ext SI cdisp10a4))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn | rma | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (mem SI (and SI rma (inv SI 3)))) (set rma (add SI rma 4)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x6 | 0x2 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (mem SI (and SI rma (inv SI 3)))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a4))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x6 | 0x3 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (set crn (ext SI (mem SI (and SI rma (inv SI 3))))) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a4))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x3004 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (or DI (sll DI (zext DI hi) 32) (zext DI lo))) (set result (add DI result (mul DI (ext DI rn) (ext DI rm)))) (set hi (subword SI result 0)) (set lo (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x3006 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (or DI (sll DI (zext DI hi) 32) (zext DI lo))) (set result (add DI result (mul DI (ext DI rn) (ext DI rm)))) (set hi (subword SI result 0)) (set lo (subword SI result 1)) (set rn (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x3007 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (or DI (sll DI (zext DI hi) 32) (zext DI lo))) (set result (add DI result (mul UDI (zext UDI rn) (zext UDI rm)))) (set hi (subword SI result 0)) (set lo (subword SI result 1)) (set rn (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x3005 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (or DI (sll DI (zext DI hi) 32) (zext DI lo))) (set result (add DI result (mul UDI (zext UDI rn) (zext UDI rm)))) (set hi (subword SI result 0)) (set lo (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x5 |
(sequence () (c-call VOID "check_option_minmax" pc) (if (lt rn rm) (set rn rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x7 |
(sequence () (c-call VOID "check_option_minmax" pc) (if (ltu rn rm) (set rn rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x4 |
(sequence () (c-call VOID "check_option_minmax" pc) (if (gt rn rm) (set rn rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x6 |
(sequence () (c-call VOID "check_option_minmax" pc) (if (gtu rn rm) (set rn rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x0 |
(set rn rm)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | 0x2 | 0x1 | uimm16 |
(set rn (sll UINT uimm16 16))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rn | 0x0 | 0x1 | simm16 |
(set rn (ext SI simm16))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 15 |
f-major | f-rn | f-8s8 |
0x5 | rn | simm8 |
(set rn (ext SI simm8))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | 0x1 | 0x1 | uimm16 |
(set rn (zext SI uimm16))
0 1 2 3 | 4 | 5 6 7 | 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-4 | f-rn3 | f-24u8n |
0xd | 0x0 | rn3 | uimm24 |
(set rn3 (zext SI uimm24))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x4 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (mul DI (ext DI rn) (ext DI rm))) (set hi (subword SI result 0)) (set lo (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x6 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (mul DI (ext DI rn) (ext DI rm))) (set hi (subword SI result 0)) (set lo (subword SI result 1)) (set rn (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x7 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (mul UDI (zext UDI rn) (zext UDI rm))) (set hi (subword SI result 0)) (set lo (subword SI result 1)) (set rn (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x5 |
(sequence ((DI result)) (c-call VOID "check_option_mul" pc) (set result (mul UDI (zext UDI rn) (zext UDI rm))) (set hi (subword SI result 0)) (set lo (subword SI result 1)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x1 |
(set rn (neg SI rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x3 |
(set rn (inv SI (or SI rn rm)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x0 |
(set rn (or SI rn rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | rm | 0x4 | uimm16 |
(set rn (or SI rm (zext SI uimm16)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | cimm4 | rma | 0x5 |
(sequence () (c-call VOID "check_option_dcache" pc) (c-call VOID "do_cache_prefetch" cimm4 rma pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xf | cimm4 | rma | 0x3 | sdisp16 |
(sequence () (c-call VOID "check_option_dcache" pc) (c-call VOID "do_cache_prefetch" cimm4 (add INT rma (ext SI sdisp16)) pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-17s16a2 |
0xe | rn | 0x0 | 0x9 | pcrel17a2 |
(sequence () (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set (reg SI h-csr 4) (add USI pc 8))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set (reg SI h-csr 4) (add USI pc 4))) (else set (reg SI h-csr 4) (add USI pc 4))) (cond VOID ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 6) 1)) (set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 7)))) ((andif (and SI (srl SI psw 12) 1) (and SI (srl SI opt 5) 1)) (set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 3)))) (else set (reg SI h-csr 5) (and INT pcrel17a2 (inv INT 1)))) (set (reg SI h-csr 6) rn))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x0 | 0x2 |
(sequence () (if (eq (and SI (srl SI psw 12) 1) 0) (if (and SI lp 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI lp (inv INT 3))) (set pc (and SI lp (inv INT 7))))) (set pc (and SI lp (inv INT 1)))) (if (and SI lp 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 0 12)))) (set pc (and SI lp (inv INT 1)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI lp (inv INT 3))) (set pc (and SI lp (inv INT 7)))))) (c-call VOID "notify_ret" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x1 | 0x2 |
(if (eq (and SI (srl SI psw 12) 1) 0) (if (and SI (srl SI psw 9) 1) (if (and SI npc 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI npc (inv INT 3))) (set pc (and SI npc (inv INT 7)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 9))) (and INT (sll INT 1 9) (sll INT 0 9))))) (sequence () (set pc (and SI npc (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 9))) (and INT (sll INT 1 9) (sll INT 0 9)))))) (if (and SI epc 1) (sequence () (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 12))) (and INT (sll INT 1 12) (sll INT 1 12)))) (if (and SI (srl SI opt 5) 1) (set pc (and SI epc (inv INT 3))) (set pc (and SI epc (inv INT 7)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 2))) (and INT (sll INT 1 2) (sll SI (and SI (srl SI psw 3) 1) 2)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 0))) (and INT (sll INT 1 0) (sll SI (and SI (srl SI psw 1) 1) 0))))) (sequence () (set pc (and SI epc (inv INT 1))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 2))) (and INT (sll INT 1 2) (sll SI (and SI (srl SI psw 3) 1) 2)))) (set (raw-reg SI h-csr 16) (or SI (and SI (raw-reg SI h-csr 16) (inv INT (sll INT 1 0))) (and INT (sll INT 1 0) (sll SI (and SI (srl SI psw 1) 1) 0))))))) (nop))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x6 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0xa |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0x6 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0x7 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0xc |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0xd |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0xe |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0xf |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | rn | rm | 0x7 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0xb |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | rn | rm | 0xe |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | rn | rm | 0xf |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0xc | rn | rm | 0x7 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0xe | rn | rm | 0xd |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0xf | rn | rm | 0x8 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0x5 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0x8 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0x9 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xa |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xb |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0x4 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x3 | rn | rm | 0x5 |
(set pc (c-call USI "ri_exception" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x8 |
(sequence () (c-call VOID "check_option_sat" pc) (if (add-oflag SI rn rm 0) (if (lt rn 0) (set rn (neg INT (sll INT 1 31))) (set rn (sub INT (sll INT 1 31) 1))) (set rn (add SI rn rm))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0x9 |
(sequence () (c-call VOID "check_option_sat" pc) (if (add-cflag SI rn rm 0) (set rn (inv INT 0)) (set rn (add SI rn rm))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnc | rma | 0x8 |
(sequence () (c-call VOID "check_write_to_text" rma) (set (mem UQI rma) (and SI rnc 255)))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9 |
0x8 | 0x0 | rn3c | 0x0 | udisp7 |
(sequence () (c-call VOID "check_write_to_text" (add SI (zext SI udisp7) tp)) (set (mem QI (add SI (zext SI udisp7) tp)) (and SI rn3c 255)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnc | rma | 0x8 | sdisp16 |
(sequence () (c-call VOID "check_write_to_text" (add SI rma (ext SI sdisp16))) (set (mem QI (add SI rma (ext SI sdisp16))) (and SI rnc 255)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0x0 | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (add SI rma (ext SI cdisp12))) (set (mem QI (add SI rma (ext SI cdisp12))) (and SI crn 255)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x0 | 0x0 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" rma) (set (mem QI rma) (and SI crn 255)) (set rma (add SI rma (ext SI cdisp10))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x0 | 0x2 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" rma) (set (mem QI rma) (and SI crn 255)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x0 | 0x3 | cdisp10 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" rma) (set (mem QI rma) (and SI crn 255)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x5 |
(if (sub-oflag SI rn rm 0) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rns | rma | 0x9 |
(sequence () (c-call VOID "check_write_to_text" (and SI rma (inv INT 1))) (set (mem UHI (and SI rma (inv INT 1))) (and SI rns 65535)))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 14 | 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9a2 | f-15 |
0x8 | 0x0 | rn3s | 0x1 | udisp7a2 | 0x0 |
(sequence () (c-call VOID "check_write_to_text" (and SI (add SI (zext SI udisp7a2) tp) (inv INT 1))) (set (mem HI (and SI (add SI (zext SI udisp7a2) tp) (inv INT 1))) (and SI rn3s 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rns | rma | 0x9 | sdisp16 |
(sequence () (c-call VOID "check_write_to_text" (and SI (add SI rma (ext SI sdisp16)) (inv INT 1))) (set (mem HI (and SI (add SI rma (ext SI sdisp16)) (inv INT 1))) (and SI rns 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-12s20 |
0xf | crn | rma | 0x6 | 0x1 | cdisp12 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (add SI rma (ext SI cdisp12))) (set (mem HI (add SI rma (ext SI cdisp12))) (and SI crn 65535)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x1 | 0x0 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 1))) (set (mem HI (and SI rma (inv SI 1))) (and SI crn 65535)) (set rma (add SI rma (ext SI cdisp10a2))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x1 | 0x2 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 1))) (set (mem HI (and SI rma (inv SI 1))) (and SI crn 65535)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x1 | 0x3 | cdisp10a2 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 1))) (set (mem HI (and SI rma (inv SI 1))) (and SI crn 65535)) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a2))))))
0 1 2 3 | 4 | 5 6 7 8 | 9 | 10 | 11 | 12 13 14 15 |
f-major | f-4 | f-callnum | f-8 | f-9 | f-10 | f-sub4 |
0x7 | 0x1 | callnum | 0x0 | 0x0 | 0x0 | 0x0 |
(c-call VOID "do_syscall" pc callnum)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0x6 |
(set r0 (add SI (sll SI rn 1) rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0x7 |
(set r0 (add SI (sll SI rn 2) rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x6 | 0x2 |
(c-call VOID "do_sleep")
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xe |
(set rn (sll SI rn (and SI rm 31)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x7 |
(set r0 (sll SI rn uimm5))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x6 |
(set rn (sll SI rn uimm5))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x2 |
(if (lt rn rm) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x1 |
(if (lt rn (zext SI uimm5)) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rn | rm | 0x2 | simm16 |
(if (lt rm (ext SI simm16)) (set rn 1) (set rn 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x3 |
(if (ltu rn rm) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x5 |
(if (ltu rn (zext SI uimm5)) (set r0 1) (set r0 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | rm | 0x3 | uimm16 |
(if (ltu rm (zext SI uimm16)) (set rn 1) (set rn 0))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn64 | rma | 0xa |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "check_write_to_text" rma) (c-call VOID "do_smcp" rma crn64 pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-16s16 |
0xf | crn64 | rma | 0xe | sdisp16 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "do_smcp16" rma sdisp16 crn64 pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x3 | 0x0 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "check_write_to_text" rma) (c-call VOID "do_smcpa" (index-of rma) cdisp10a8 crn64 pc) (set rma rma))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn64 | rma | 0x2 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "check_write_to_text" rma) (c-call VOID "do_smcpi" (index-of rma) crn64 pc) (set rma rma))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x3 | 0x2 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "check_write_to_text" rma) (c-call VOID "do_smcp" rma crn64 pc) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a8))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn64 | rma | 0x5 | 0x3 | 0x3 | cdisp10a8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_option_cp64" pc) (c-call VOID "do_smcp" rma crn64 pc) (c-call VOID "check_write_to_text" rma) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a8))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xd |
(set rn (sra SI rn (and SI rm 31)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x3 |
(set rn (sra SI rn uimm5))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rm | 0xc |
(set rn (srl SI rn (and SI rm 31)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 14 15 |
f-major | f-rn | f-5u8 | f-sub3 |
0x6 | rn | uimm5 | 0x2 |
(set rn (srl SI rn uimm5))
0 1 2 3 | 4 | 5 | 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-4 | f-5 | f-2u6 | f-rm | f-sub4 |
0x1 | 0x0 | 0x0 | udisp2 | rm | 0xc |
(if (c-call BI "big_endian_p") (set sar (zext SI (mul INT (and INT (add INT udisp2 rm) 3) 8))) (set sar (sub INT 32 (zext SI (mul INT (and INT (add INT udisp2 rm) 3) 8)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0xa |
(sequence () (c-call VOID "check_option_sat" pc) (if (sub-oflag SI rn rm 0) (if (lt rn 0) (set rn (neg INT (sll INT 1 31))) (set rn (sub INT (sll INT 1 31) 1))) (set rn (sub SI rn rm))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | rm | 0x1 | 0xb |
(sequence () (c-call VOID "check_option_sat" pc) (if (sub-cflag SI rn rm 0) (set rn 0) (set rn (sub SI rn rm))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn | f-12 | f-13 | f-14 |
0x7 | rn | csrn | 0x1 | 0x0 | 0x0 |
(set csrn rn)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x7 | 0x1 | 0x0 | 0x0 | 0x0 |
(set hi rn)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x8 | 0x1 | 0x0 | 0x0 | 0x0 |
(set lo rn)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 | 13 | 14 | 15 |
f-major | f-rn | f-csrn-lo | f-12 | f-13 | f-14 | f-csrn-hi |
0x7 | rn | 0x1 | 0x1 | 0x0 | 0x0 | 0x0 |
(set lp rn)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xf | rn | 0x0 | 0x4 | uimm16 |
(c-call VOID "do_stcb" rn uimm16)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | rn | rma | 0xc |
(c-call VOID "do_stcb" rn (and SI rma 65535))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rn | rm | 0x4 |
(set rn (sub SI rn rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x0 | rnl | rma | 0xa |
(sequence () (c-call VOID "check_write_to_text" (and SI rma (inv INT 3))) (set (mem USI (and SI rma (inv INT 3))) rnl))
0 1 2 3 | 4 5 6 7 | 8 | 9 10 11 12 13 | 14 15 |
f-major | f-rn | f-8 | f-7u9a4 | f-sub2 |
0x4 | rnl | 0x0 | udisp7a4 | 0x2 |
(sequence () (c-call VOID "check_write_to_text" (and UINT (add UINT udisp7a4 sp) (inv INT 3))) (set (mem SI (and UINT (add UINT udisp7a4 sp) (inv INT 3))) rnl))
0 1 2 3 | 4 | 5 6 7 | 8 | 9 10 11 12 13 | 14 15 |
f-major | f-4 | f-rn3 | f-8 | f-7u9a4 | f-sub2 |
0x4 | 0x0 | rn3l | 0x1 | udisp7a4 | 0x2 |
(sequence () (c-call VOID "check_write_to_text" (and SI (add SI (zext SI udisp7a4) tp) (inv INT 3))) (set (mem SI (and SI (add SI (zext SI udisp7a4) tp) (inv INT 3))) rn3l))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xc | rnl | rma | 0xa | sdisp16 |
(sequence () (c-call VOID "check_write_to_text" (and SI (add SI rma (ext SI sdisp16)) (inv INT 3))) (set (mem SI (and SI (add SI rma (ext SI sdisp16)) (inv INT 3))) rnl))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 | 30 31 |
f-major | f-rn | f-24u8a4n | f-sub2 |
0xe | rnl | addr24a4 | 0x2 |
(sequence () (c-call VOID "check_write_to_text" (zext SI addr24a4)) (set (mem SI (zext SI addr24a4)) rnl))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn | rma | 0x8 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 3))) (set (mem SI (and SI rma (inv SI 3))) crn))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-16s16 |
0xf | crn | rma | 0xc | sdisp16 |
(sequence () (c-call VOID "check_option_cp" pc) (set (mem SI (and SI (add SI rma sdisp16) (inv SI 3))) crn))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x2 | 0x0 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 3))) (set (mem SI (and SI rma (inv SI 3))) crn) (set rma (add SI rma (ext SI cdisp10a4))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-crn | f-rm | f-sub4 |
0x3 | crn | rma | 0x0 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 3))) (set (mem SI (and SI rma (inv SI 3))) crn) (set rma (add SI rma 4)))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x2 | 0x2 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 3))) (set (mem SI (and SI rma (inv SI 3))) crn) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb0 me0)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me0) (or SI (and SI rma (inv SI modulo-mask)) mb0) (add SI rma (ext SI cdisp10a4))))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 | 20 21 | 22 23 24 25 26 27 28 29 30 31 |
f-major | f-crn | f-rm | f-sub4 | f-ext4 | f-ext62 | f-cdisp10 |
0xf | crn | rma | 0x5 | 0x2 | 0x3 | cdisp10a4 |
(sequence () (c-call VOID "check_option_cp" pc) (c-call VOID "check_write_to_text" (and SI rma (inv SI 3))) (set (mem SI (and SI rma (inv SI 3))) crn) (set rma (sequence SI ((SI modulo-mask)) (set modulo-mask (sequence SI ((SI temp)) (set temp (or SI mb1 me1)) (srl SI -1 (c-call SI "do_ldz" temp)))) (if SI (eq (and SI rma modulo-mask) me1) (or SI (and SI rma (inv SI modulo-mask)) mb1) (add SI rma (ext SI cdisp10a4))))))
0 1 2 3 | 4 5 6 7 | 8 | 9 | 10 11 | 12 13 14 15 |
f-major | f-rn | f-8 | f-9 | f-2u10 | f-sub4 |
0x7 | 0x0 | 0x0 | 0x0 | uimm2 | 0x6 |
(cond VOID ((eq uimm2 0) (set exc (or SI exc (sll INT 1 4)))) ((eq uimm2 1) (set exc (or SI exc (sll INT 1 5)))) ((eq uimm2 2) (set exc (or SI exc (sll INT 1 6)))) ((eq uimm2 3) (set exc (or SI exc (sll INT 1 7)))))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x2 | 0x1 |
(sequence () (c-call VOID "check_option_cp" pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x7 | 0x0 | 0x1 | 0x1 |
(nop)
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x2 | rn | rma | 0x4 |
(sequence ((SI result)) (c-call VOID "check_option_bit" pc) (set result (zext SI (mem UQI rma))) (set (mem UQI rma) 1) (set rn result))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16s16 |
0xf | rn | rm | 0x2 | simm16 |
(set rn (c-call SI "do_UCI" rn rm (zext SI uimm16) pc))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 |
f-major | f-rn | f-rm | f-sub4 |
0x1 | rn | rm | 0x2 |
(set rn (xor SI rn rm))
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
f-major | f-rn | f-rm | f-sub4 | f-16u16 |
0xc | rn | rm | 0x6 | uimm16 |
(set rn (xor SI rm (zext SI uimm16)))
((emit lb rnc rma))
((emit lbu rnuc rma))
((emit lh rns rma))
((emit lhu rnus rma))
((emit lmcp crn64 rma))
((emit lw rnl rma))
((emit lwcp crn rma))
((emit mov (rn 0) (rm 0)))
((emit sb rnc rma))
((emit sh rns rma))
((emit smcp crn64 rma))
((emit sw rnl rma))
((emit swcp crn rma))
This documentation was machine generated from the cgen cpu description
files for this architecture.
https://sourceware.org/cgen/